Design and Implementation of FPGA-based Concurrent Controller
Design and Implementation of FPGA-based Concurrent Controller
Keywords:
VHDL, FPGA, Spatan-3 kit, Xilinx, floating point, inverse kinematicsAbstract
In this paper, a concurrent motion control system is designed and implemented to control and achieve the consensus of a multi-axis structure using inverse kinematic technique. Speed and precision were the main targets. Thus a synthesizable model to support floating point calculations is presented using a combinational divider. This model is used to implement trigonometric equation using Look up Tables (LUT) and hence can easily be implemented on FPGA devices. The gate level demonstration of the entire model containing Arithmetic Logic Unit (ALU), multiplier and divider are also presented. As FPGA has a concurrent structure for high-speed arithmetic calculations, which can be utilized for parallel control of several motors, so this algorithm has improved the efficiency and has reduced execution time from 5.2 μsec to 1.4 μsec with an accuracy of ±1 to manipulator position. For more precision, the tradeoff is between accuracy and execution time. Synthesis model to support floating point division calculations up to n-bits is designed, where implementation results for floating digit 1 to 11 are given with their time lag, slices and LUT used. The test points were verified in simulation and on hardware platform which exhibits the high speed implementation of the proposed model.
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